1. Field of the Invention
The invention relates to a method of obtaining a structure on a semiconductor wafer by etching through structures defined by an etch mask using a plasma.
2. Description of the Related Art
In semiconductor plasma etching applications, a plasma etcher is usually used to transfer a photoresist mask pattern into a circuit and line pattern of a desired thin film and/or filmstack (conductors or dielectric insulators) on a Si wafer. This is achieved by etching away the films (and filmstacks) underneath the photoresist materials in the opened areas of the mask pattern. This etching reaction is initiated by the chemically active species and electrically charged particles (ions) generated by exciting an electric discharge in a reactant mixture contained in a vacuum enclosure also referred to as a reactor chamber. Additionally, the ions are also accelerated towards the wafer materials through an electric field created between the gas mixture and the wafer materials, generating a directional removal of the etching materials along the direction of the ion trajectory in a manner referred to as anisotropic etching. At the finish of the etching sequence, the masking materials are removed by stripping it away, leaving in its place a replica of the lateral pattern of the original intended mask patterns. During the etching process, the mask materials are usually eroded and/or damaged in exchange for the pattern transfer. Consequently, some of the damage and erosion also may be transferred to the underlying layers leaving such undesirable pattern distortions such as striation, CD enlargement, etc.
The objective of the etching methodology, therefore, includes reducing the photoresist mask erosion to enhance the fidelity of the pattern transfer from the photoresist mask patterns.
In a dielectric etch, the aspect ratio (AR) is defined as the ratio between the feature depth (d) and width (w1) as shown in FIG. 9, which shows a photoresist mask 904 over a dielectric layer 908 over a silicon nitride barrier layer 910. The dielectric layer 908 has been etched forming features 916, which have bowed sidewalls. In high aspect ratio (HAR) dielectric etch, where AR is greater than 10, one must meet many competing requirements:
High etch selectivity between the dielectric layer and the mask layer
Vertically straight feature profile
Control of the critical dimensions (CD)
Higher etch selectivity is needed to preserve the mask pattern throughout the etch process, and prevent undesirable irregular deviations (striations) in the etch profile. A vertically straight feature profile is necessary to maintain device yield. There are several mechanisms to cause deviations from the vertically straight profile: bowing refers to widening in the upper-middle portion of the feature (w2>w1 in FIG. 9); necking refers to narrowing near the top of the feature (w4<w1 in FIG. 10); tapering refers to narrowing towards the bottom of the feature (w2>w3); and twisting refers to random deviation of the position and orientation at the bottom of the feature or the distortion of the bottom shape, leading to misalignment to the underlying active devices. The bowing depth dB is shown as the depth where bowing occurs, as shown. CD control has become increasingly critical as feature sizes continue to shrink. Often times, reduction or shrink of the CD from the values defined in the mask must be achieved during HAR etch.
FIG. 10 is a schematic view of another etch performed using conventional techniques to form features 1016. In this example, a necking occurs to form a feature width w4, before a bowing occurs forming a feature width w2.
Efforts have been made in the prior art to solve these problems. One of the most challenging problem is bow protection, or to eliminate vertical profile bowing. A common conventional method is to use polymerizing fluorocarbon chemistry to passivate the feature sidewalls during plasma etch. However, this approach is limited by the complex competing chemistries, and trade-offs between bow protection and etch stop. As aspect ratio further increases, this conventional method has become inadequate for bow protection. Variations in sidewall passivation (deposition) while etching have been explored, for example: Providing passivation additives during an etch step increases the propensity for polymerization during plasma etch, leading to enhanced sidewall passivation and bow protection. However, the etch chemistry becomes even more complicated, and consequently more susceptible to trade-off limitations such as etch stop.